soft-core
英 [ˈsɒft kɔː(r)]
美 [ˈsɔːft kɔːr]
adj. 软性色情的; (性描写等)隐晦的,含蓄的
牛津词典
adj.
- 软性色情的;(性描写等)隐晦的,含蓄的
showing or describing sexual activity without being too detailed or shocking
柯林斯词典
- (性描写)非赤裸裸的,较隐晦的
Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.
双语例句
- The paper built a soft core processor which named NIOS II in the FPGA by using SOPC technology, and running μ C/ OS-ⅱ operating system on the NIOS II soft-core in order to achieve the scheduling of the system task.
通过使用SOPC技术,在FPGA内部构建了NIOSⅡ软核处理器,并在NIOSⅡ软核上运行μC/OS-Ⅱ操作系统,从而实现了对系统任务的调度。 - NIOS ⅱ soft-core processor is a flexible and efficient embedded processor promoted by Altera Corporation.
NIOSⅡ软核处理器是Altera公司推出的一款灵活高效的嵌入式处理器。 - First some algorithms of gray-scale quantifying are analysised and simulated, and then the detailed designs of complex mold sub-module, quantifying sub-module and SDRAM soft-core controller is presented. 4.
先对灰度量化算法进行了分析和仿真比较,然后详细介绍了复数求模子模块、量化子模块、SDRAM控制器的设计。 - Design and Implementation of Multi-channel Phone-billing-system Based upon NIOS Soft-core CPU
基于NIOS软核CPU技术的多路电话计费系统的设计与实现 - Implementation of Soft-Core Processor and DDFS Based on FPGA
基于FPGA的软核处理器及DDFS实现 - First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
第一,运用了在单芯片上实现系统功能的设计思想,采用了高性能的软核处理器(NiosIICPU)和IP复用技术,提高了整个系统的运行速度和进一步改进的灵活性。 - It inherits the hardcore, soft-core, DSP, memory, peripheral I/ O and programmable logic.
它继承了硬核、软核、DSP、存储器外围I∕O及可编程逻辑。 - The Nios ⅱ soft-core processor improve the integration of the system and is helpful to the miniaturization of instrument.
NiosⅡ软核处理器提高了系统的集成度,有利于系统的小型化,降低了成本。 - According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
为构建网络化的数据采集系统,根据数据采集模块与处理控制模块通过以太网相连接的结构模型,设计了基于Nios软核系统的嵌入式以太网网络接口模块。 - Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
详细设计了帧间解码IP软核,包括运动矢量生成模块、预测处理模块和插值模块。