词语吧>英语词典>soft-core翻译和用法

soft-core

英 [ˈsɒft kɔː(r)]

美 [ˈsɔːft kɔːr]

adj.  软性色情的; (性描写等)隐晦的,含蓄的

牛津词典

    adj.

    • 软性色情的;(性描写等)隐晦的,含蓄的
      showing or describing sexual activity without being too detailed or shocking

      柯林斯词典

      • (性描写)非赤裸裸的,较隐晦的
        Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.

        双语例句

        • Implementation of Soft-Core Processor and DDFS Based on FPGA
          基于FPGA的软核处理器及DDFS实现
        • Then, through the embedded soft-core processor technology based on FPGA, entire system the control, and processing and transmission of data of were achieved by using the co-design approach of hardware and software.
          然后,通过基于FPGA的嵌入式软核处理器技术,采用软硬件协同设计的方法,实现对整个系统功能的控制及数据的处理与发送。
        • Research and Design of Nios ⅱ Soft-core Processor
          NiosⅡ软核处理器的研究与设计
        • The paper built a soft core processor which named NIOS II in the FPGA by using SOPC technology, and running μ C/ OS-ⅱ operating system on the NIOS II soft-core in order to achieve the scheduling of the system task.
          通过使用SOPC技术,在FPGA内部构建了NIOSⅡ软核处理器,并在NIOSⅡ软核上运行μC/OS-Ⅱ操作系统,从而实现了对系统任务的调度。
        • Implementing the synchronization of industrial Ethernet precise clock based on Nios II soft-core
          基于NiosⅡ软核的工业以太网精确时钟同步的实现
        • I distinctly remember my high school self, wide-eyed, poring over the soft-core Starr report with friends.
          我还清楚地记得高中时代的我,睁大了眼睛,和朋友们一起狼吞虎咽地读着《斯塔尔报告》(StarrReport)中那些香艳的内容。
        • According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
          为构建网络化的数据采集系统,根据数据采集模块与处理控制模块通过以太网相连接的结构模型,设计了基于Nios软核系统的嵌入式以太网网络接口模块。
        • First some algorithms of gray-scale quantifying are analysised and simulated, and then the detailed designs of complex mold sub-module, quantifying sub-module and SDRAM soft-core controller is presented. 4.
          先对灰度量化算法进行了分析和仿真比较,然后详细介绍了复数求模子模块、量化子模块、SDRAM控制器的设计。
        • Research and Design of Soft-core IP for AVS Inter Decoder
          AVS帧间解码IP软核的研究与设计
        • For the digital part, this design is mean to construct the SOPC system in the FPGA, embedded Nios II soft-core processor to control the operation of the entire system.
          对于数字部分,在FPGA内构建SOPC系统,嵌入NIOSii软核处理器对整个系统进行控制。